Accelerators and Enablement for Application-Specific Multicore Platforms
Chair of Integrated Systems
Technische Universitat Munchen
COM1 Level 3
MR1, COM1-03-19
Abstract:
Multicore technology plays a pivotal role in addressing key societal challenges. For example, safe, ecological mobility, widespread rollout of eHealth, smart industrial automation and the development of a secure, high-bandwidth, low-latency mobile communication infrastructure for Industry 4.0, all these application domains are critically dependent on high-performance, low power and dependable computing platforms. However, multicore technology also comes with a number of unique challenges for industry and academia. Today, the efficient utilization of massively parallel computing resources largely depends on the experience of individual programmers.
Application-specific accelerators and generic enablement building blocks for Multicore System on Chip (MCSoC) platforms are research foci at the Chair of Integrated Systems at TU Munchen. These building blocks support a more performant, energy-efficient, easier to use and more resilient deployment of multicore processors by application programmers and system integrators. In my talk, I will present an overview on current and past research projects of my group. As data access latencies and bandwidth bottlenecks frequently represent major limiting factors for the computational effectiveness of many-core processor architectures, a particular emphasis will be on two conceptually complementary approaches to reduce the synchronization overheads for coherence maintenance and to improve the locality between computing resources and data: Region-based cache coherence and near memory acceleration.
Biodata:
Andreas Herkersdorf is a professor at the Department of Electrical and Computer Engineering and also a member of the Department of Informatics at Technische Universitat Munchen (TUM). He received the diploma degree from TUM in 1987 and the Dr. degree from ETH Zurich, Switzerland, in 1991, both in electrical engineering. Between 1988 and 2003, he has been a research staff member and manager at the IBM Zurich Research Laboratory in Ruschlikon, Switzerland. Since 2003, Dr. Herkersdorf is head of the Chair of Integrated Systems at TUM. He is a senior member of the IEEE, member of the DFG (German Research Foundation) Review Board and serves as editor for Springer, Elsevier and deGruyter journals for design automation, communications electronics and information technology. His research interests include application-specific multi-processor architectures, IP network processing, Network on Chip, system level SoC modeling and design space exploration methods, and self-aware fault-tolerant computing.